The latest generation of the Intel x86 family of CPUs. Core supersedes the 13-year run of the Pentium, which was introduced in 1993. It essentially represents the ninth generation of the x86 architecture, the first chip appearing in the IBM PC in 1981. All Core chips are more power efficient than previous Pentium models.
In January 2006, the 32-bit Core Duo was introduced, the first Intel chip with the Core brand, but which was based on the earlier Pentium M microarchitecture. The Core Duo was intended for laptops, but two months later, Intel shipped the Dual-Core Xeon LV (low voltage), a Core Duo-based Xeon for servers. See Core Duo and microarchitecture.
In mid-2006, 64-bit Core 2 Duo models debuted for both desktops and laptops along with an Extreme model for high-end workstations. Core 2 chips are based on new architecture with major enhancements (see details below). See Core 2.
Solo, Duo and Quad
Although the Core architecture features dual cores, chips that are rejected at time of manufacture are turned into single-core CPUs by permanently disabling the core that contained the failed components. Such "Core Solo" chips can be sold at less cost for the value market and applications that do not need the extra processing power.
Core Duo and Core 2 Duo chips have two distinct processors (see dual core). Core 2 Quad chips with four processors were introduced in late 2006.
Architectural Features of Core 2
The Core 2 Duo family is based on the Core microarchitecture and features low power consumption for both laptops and desktop machines. Following are the major advancements beyond the Pentium chips.
"Wide Dynamic Execution" is a set of techniques that execute more instructions in parallel. For example, four instructions can be executed in one clock cycle, rather than three, and instruction pairs, such as compare and branch, are combined into one microinstruction (see microcode).
"Intelligent Power Capability" makes elements on the chip more granular so they can each be powered down separately if not used.
"Advanced Smart Cache" shares the L2 cache among processors, allowing the core that needs more cache memory to have it.
"Smart Memory Access" uses advanced techniques to determine which data in memory can be cached, and more sophisticated algorithms are used to speed up out-of-order processing, where instructions down the pipeline can be executed ahead of time.
"Advanced Digital Media Boost" provides a performance increase for multimedia operations such as compression and decompression by doubling the amount of data that can be processed. Instead of operating on 128 bits in two clock cycles, Core chips can process all 128 bits in one clock cycle.
In January 2006, the 32-bit Core Duo was introduced, the first Intel chip with the Core brand, but which was based on the earlier Pentium M microarchitecture. The Core Duo was intended for laptops, but two months later, Intel shipped the Dual-Core Xeon LV (low voltage), a Core Duo-based Xeon for servers. See Core Duo and microarchitecture.
In mid-2006, 64-bit Core 2 Duo models debuted for both desktops and laptops along with an Extreme model for high-end workstations. Core 2 chips are based on new architecture with major enhancements (see details below). See Core 2.
Solo, Duo and Quad
Although the Core architecture features dual cores, chips that are rejected at time of manufacture are turned into single-core CPUs by permanently disabling the core that contained the failed components. Such "Core Solo" chips can be sold at less cost for the value market and applications that do not need the extra processing power.
Core Duo and Core 2 Duo chips have two distinct processors (see dual core). Core 2 Quad chips with four processors were introduced in late 2006.
Architectural Features of Core 2
The Core 2 Duo family is based on the Core microarchitecture and features low power consumption for both laptops and desktop machines. Following are the major advancements beyond the Pentium chips.
"Wide Dynamic Execution" is a set of techniques that execute more instructions in parallel. For example, four instructions can be executed in one clock cycle, rather than three, and instruction pairs, such as compare and branch, are combined into one microinstruction (see microcode).
"Intelligent Power Capability" makes elements on the chip more granular so they can each be powered down separately if not used.
"Advanced Smart Cache" shares the L2 cache among processors, allowing the core that needs more cache memory to have it.
"Smart Memory Access" uses advanced techniques to determine which data in memory can be cached, and more sophisticated algorithms are used to speed up out-of-order processing, where instructions down the pipeline can be executed ahead of time.
"Advanced Digital Media Boost" provides a performance increase for multimedia operations such as compression and decompression by doubling the amount of data that can be processed. Instead of operating on 128 bits in two clock cycles, Core chips can process all 128 bits in one clock cycle.
 | Reproduced with permission from Computer Desktop Encyclopedia. Copyright (c) 1981-2008 The Computer Language Company Inc. All rights reserved. |
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