A Floating Gate Holds the Charge
EEPROM and flash memory bit cells are CMOS-based transistors that hold a charge on a "floating gate." With no charge on the floating gate, the transistor acts normally, and a pulse on the control gate causes current to flow. When charged, it blocks the control gate action, and current does not flow. Charging is accomplished by grounding the source and drain terminals and placing sufficient voltage on the control gate tunnel through the oxide to the floating gate. A reverse voltage channeled from another transistor clears the charge by causing it to dissipate into the substrate.
EEPROMs have a lifespan of between 10K and 100K write cycles, which is considerably greater than the EPROMs (single "E") that preceded them. See EPROM, SEEPROM, memory types and flash memory.
The Floating Gate Transistor
EEPROM and flash memory cells use a transistor with a floating gate that holds a charge. When charged, the action of the control gate is impeded, and the charged/uncharged state determines the 0 or 1 content of the bit.
The Erase Circuit
The floating gate transistor stores the charge, and a regular MOS transistor is used to erase it. Most EEPROMs are byte erasable with one MOS transistor for every eight floating gate transistors. Flash memory uses only one MOS transistor to erase an entire block of floating gate transistors.
![]() | Reproduced with permission from Computer Desktop Encyclopedia. Copyright (c) 1981-2009 The Computer Language Company Inc. All rights reserved. |
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